Bandpass ΔΣ modulators (BPDSMs) are preferred in many RF systems as they can perform digitization at IF frequencies, greatly simplifying the system architecture. The design of a BPDSM has two major challenges. First, it is nontrivial to build a sharp noise transfer function (NTF) at the IF frequency, leading to a limited SQNR. Second, it consumes high power. A BPDSM typically adopts a closed-loop architecture with a bandpass filter (BPF) at its core –. The BPF usually requires multiple wide-band power-hungry amplifiers. To save power, reference  implements the BPF by combining passive N-path filters with open-loop amplifiers. However, because its amplifiers still need to process high-frequency signals, and it requires operating many switches and logic gates at the sampling rate, its energy efficiency (Schreier FoM) is limited to 161.7dB despite not counting the clock generator power.